Device utilization summary:
---------------------------

Selected Device : 2s300efg456-6 

 Number of Slices:                    1009  out of   3072    32%  
 Number of Slice Flip Flops:           162  out of   6144     2%  
 Number of 4 input LUTs:              1879  out of   6144    30%  
 Number of bonded IOBs:                 66  out of    329    20%  
 Number of GCLKs:                        1  out of      4    25%  


Clock Information:
------------------
-----------------------------------+------------------------+-------+
Clock Signal                       | Clock buffer(FF name)  | Load  |
-----------------------------------+------------------------+-------+
m_clock                            | BUFGP                  | 162   |
-----------------------------------+------------------------+-------+

Timing Summary:
---------------

   Minimum period: 36.251ns (Maximum Frequency: 27.585MHz)
   Minimum input arrival time before clock: 16.697ns
   Maximum output required time after clock: 36.233ns
   Maximum combinational path delay: No path found

=========================================================================


Design Summary:

Logic Utilization:
  Number of Slice Flip Flops:       162 out of  6,144    2%
  Number of 4 input LUTs:         1,870 out of  6,144   30%
Logic Distribution:
    Number of occupied Slices:                         983 out of  3,072   31%
    Number of Slices containing only related logic:    983 out of    983  100%
    Number of Slices containing unrelated logic:         0 out of    983    0%

Total Number 4 input LUTs:        1,878 out of  6,144   30%
      Number used as logic:                     1,870
      Number used as a route-thru:                  8
   Number of bonded IOBs:            65 out of    325   20%
   Number of GCLKs:                   1 out of      4   25%
   Number of GCLKIOBs:                1 out of      4   25%

Total equivalent gate count for design:  12,777
Additional JTAG gate count for IOBs:  3,168


Device Utilization Summary:

   Number of GCLKs                     1 out of 4      25%
   Number of External GCLKIOBs         1 out of 4      25%
      Number of LOCed GCLKIOBs         0 out of 1       0%

   Number of External IOBs            65 out of 325    20%
      Number of LOCed IOBs             0 out of 65      0%

   Number of SLICEs                  983 out of 3072   31%


**************************
Generating Clock Report
**************************

+---------------------+--------------+------+------+------------+-------------+
|        Clock Net    |   Resource   |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
+---------------------+--------------+------+------+------------+-------------+
|       m_clock_BUFGP |      GCLKBUF1| No   |  130 |  0.080     |  0.507      |
+---------------------+--------------+------+------+------------+-------------+