Device utilization summary:
---------------------------

Selected Device : 2s300efg456-6 

 Number of Slices:                    1079  out of   3072    35%  
 Number of Slice Flip Flops:           163  out of   6144     2%  
 Number of 4 input LUTs:              2021  out of   6144    32%  
 Number of bonded IOBs:                 66  out of    329    20%  
 Number of GCLKs:                        1  out of      4    25%  


Clock Information:
------------------
-----------------------------------+------------------------+-------+
Clock Signal                       | Clock buffer(FF name)  | Load  |
-----------------------------------+------------------------+-------+
m_clock                            | BUFGP                  | 163   |
-----------------------------------+------------------------+-------+

Timing Summary:
---------------

   Minimum period: 33.536ns (Maximum Frequency: 29.819MHz)
   Minimum input arrival time before clock: 14.904ns
   Maximum output required time after clock: 34.859ns
   Maximum combinational path delay: No path found

=========================================================================


Design Summary:

Logic Utilization:
  Number of Slice Flip Flops:       163 out of  6,144    2%
  Number of 4 input LUTs:         2,010 out of  6,144   32%
Logic Distribution:
    Number of occupied Slices:                       1,061 out of  3,072   34%
    Number of Slices containing only related logic:  1,061 out of  1,061  100%
    Number of Slices containing unrelated logic:         0 out of  1,061    0%

Total Number 4 input LUTs:        2,021 out of  6,144   32%
      Number used as logic:                     2,010
      Number used as a route-thru:                 11
   Number of bonded IOBs:            65 out of    325   20%
   Number of GCLKs:                   1 out of      4   25%
   Number of GCLKIOBs:                1 out of      4   25%

Total equivalent gate count for design:  13,670
Additional JTAG gate count for IOBs:  3,168


Device Utilization Summary:

   Number of GCLKs                     1 out of 4      25%
   Number of External GCLKIOBs         1 out of 4      25%
      Number of LOCed GCLKIOBs         0 out of 1       0%

   Number of External IOBs            65 out of 325    20%
      Number of LOCed IOBs             0 out of 65      0%

   Number of SLICEs                 1061 out of 3072   34%


**************************
Generating Clock Report
**************************

+---------------------+--------------+------+------+------------+-------------+
|        Clock Net    |   Resource   |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|
+---------------------+--------------+------+------+------------+-------------+
|       m_clock_BUFGP |      GCLKBUF1| No   |  131 |  0.073     |  0.500      |
+---------------------+--------------+------+------+------------+-------------+